atk_dnesp32s3: fix set xl9555 port1 output state (#525)

Signed-off-by: Jack Huang <jackhuang021@gmail.com>
This commit is contained in:
JackHuang021
2025-04-22 10:28:26 +08:00
committed by GitHub
parent 3404180a77
commit abb594bddd
2 changed files with 8 additions and 4 deletions

View File

@@ -39,14 +39,16 @@ public:
void SetOutputState(uint8_t bit, uint8_t level) { void SetOutputState(uint8_t bit, uint8_t level) {
uint16_t data; uint16_t data;
int index = bit;
if (bit < 8) { if (bit < 8) {
data = ReadReg(0x02); data = ReadReg(0x02);
} else { } else {
data = ReadReg(0x03); data = ReadReg(0x03);
bit -= 8; index -= 8;
} }
data = (data & ~(1 << bit)) | (level << bit); data = (data & ~(1 << index)) | (level << index);
if (bit < 8) { if (bit < 8) {
WriteReg(0x02, data); WriteReg(0x02, data);

View File

@@ -28,14 +28,16 @@ public:
void SetOutputState(uint8_t bit, uint8_t level) { void SetOutputState(uint8_t bit, uint8_t level) {
uint16_t data; uint16_t data;
int index = bit;
if (bit < 8) { if (bit < 8) {
data = ReadReg(0x02); data = ReadReg(0x02);
} else { } else {
data = ReadReg(0x03); data = ReadReg(0x03);
bit -= 8; index -= 8;
} }
data = (data & ~(1 << bit)) | (level << bit); data = (data & ~(1 << index)) | (level << index);
if (bit < 8) { if (bit < 8) {
WriteReg(0x02, data); WriteReg(0x02, data);