From 61bf5754db0c016938ceece196edcb7dfcb68b03 Mon Sep 17 00:00:00 2001
From: Y1hsiaochunnn <66012385+Y1hsiaochunnn@users.noreply.github.com>
Date: Wed, 21 May 2025 15:56:07 +0800
Subject: [PATCH] Add some register configuration for 1.75 amoled screen to
 adapt to the new screen (#646)

---
 .../esp32-s3-touch-amoled-1.75.cc                            | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/main/boards/waveshare-s3-touch-amoled-1.75/esp32-s3-touch-amoled-1.75.cc b/main/boards/waveshare-s3-touch-amoled-1.75/esp32-s3-touch-amoled-1.75.cc
index 9631c6b0..e602ea45 100644
--- a/main/boards/waveshare-s3-touch-amoled-1.75/esp32-s3-touch-amoled-1.75.cc
+++ b/main/boards/waveshare-s3-touch-amoled-1.75/esp32-s3-touch-amoled-1.75.cc
@@ -64,6 +64,11 @@ public:
 #define LCD_OPCODE_WRITE_COLOR (0x32ULL)
 
 static const sh8601_lcd_init_cmd_t vendor_specific_init[] = {
+    // set display to qspi mode
+    {0xFE, (uint8_t[]){0x20}, 1, 0},
+    {0x19, (uint8_t[]){0x10}, 1, 0},
+    {0x1C, (uint8_t[]){0xA0}, 1, 0},
+
     {0xFE, (uint8_t[]){0x00}, 1, 0},
     {0xC4, (uint8_t[]){0x80}, 1, 0},
     {0x3A, (uint8_t[]){0x55}, 1, 0},